1. Field of the Invention
The invention relates to a HS-PDSCH (High Speed Physical Downlink Shared Channel) decoder, a method of processing received data in the HS-PDSCH decoder, a mobile radio-signal communication device including the HS-PDSCH, and a computer-readable storage medium storing therein a program for causing a computer to carry out the method of processing received data in the HS-PDSCH decoder.
2. Description of the Related Art
In a W-CDMA (Wideband Code Division Multiple Access) type communication system, a high-speed downlink packet access (HSDPA) function is one of fundamental functions for supporting multi-media service in downlink, and is suggested in the standard release 5 of 3GPP (3rd Generation Partnership Project).
HSDPA is, as indicated with a name thereof, is a function of swiftly transmitting and receiving data between mobile radio-signal communication devices both operating in accordance with 3GPP. The HSDPA function ensures a user a data-transmission speed which was not conventionally accomplished due to limitations of a radio-signal access network. Herein, a radio-signal access network indicates a network through which a mobile radio-signal communication device of a user and a base station can make communication with each other.
The stuff of 3GPP is presently developing a highly reliable HSDPA function having high possibility of being accomplished. If such a HSDPA function is accomplished, it would be possible to ensure an extremely high data transmission rate, specifically, 10 Mbps at greatest, with a band width of 5 MHz or greater in downlink. As a result, it is possible to present highly qualified applications such as video-streaming, a conversation type application, and video on demand.
Fundamental techniques such as AMC (Adaptive Modulation and Coding) and HARQ (Hybrid Automatic Repeat Request) are developed by 3GPP stuffs in order to accomplish the HSDPA function.
In the Adaptive Modulation and Coding, a base station monitors instantaneous quality of a signal received by a mobile radio-signal communication device, automatically selects the best modulation and coding rate in accordance with variation of the monitored quality of a received signal, and transmits data in accordance with the selected modulation and coding rate.
In the Adaptive Modulation and Coding, for instance, when a received signal has good quality, high-speed 16 QAM (16 Quadrature Amplitude Modulation) is selected as a modulation system, whereas when a received signal has poor quality, low-speed QPSK (Quadrature Phase Shift Keying) is selected.
When a received signal has good quality, a coding rate having small forward error collection ability is selected, whereas when a received signal has poor quality, a coding rate having high forward error collection ability is selected in accordance with signal-receiving environment.
Thus, if a received signal has good quality, it is possible to enhance a data transmission efficiency by raising a data transmission rate.
HARQ is a technique comprised of the existing ARQ (error detection and re-transmission function additionally having FEC (Forward Error Collection).
In ARQ, when an error which cannot be collected by ARQ is detected, a request of re-transmitting packets is transmitted to a person who a user presently makes communication to.
In contrast, in HARQ, a forward error collection code is received in advance from a person who a user presently makes communication to, and forward error collection is carried out through the use of the received forward error collection code.
Accordingly, it is possible in HARQ to enhance communication quality and reduce a number of re-transmission of packets from a person who a user presently makes communication to.
Furthermore, in HARQ, in order to enhance a quality of re-transmitted packets, there is carried out a chase/combining step (hereinbelow, referred to as “combining step”) in which a packet from which an error was detected, and a re-transmitted packet are combined with each other.
FIG. 9 is a block diagram illustrating a combining step.
It is supposed that an error is detected in a packet 10 transmitted from a base station (transmitter) to a mobile radio-signal communication device (receiver) of a user.
In such a case, the mobile radio-signal communication device of a user transmits a request of re-transmitting the packet, to the base station.
On receipt of the request of re-transmitting the packet from the mobile radio-signal communication device of a user, the base station transmits a packet 11 to the mobile radio-signal communication device of a user.
On receipt of the packet 11, the mobile radio-signal communication device of a user carries out the combining step through the use of an adder 12 for combining the packet 10 in which an error was detected, and the thus re-transmitted packet 11 to each other.
By carrying out the combining step, it is possible in HARQ to reduce errors in re-transmitted packets.
Hereinbelow is explained a HARQ step.
First, a HARQ step to be carried out in a base station (transmitter) is explained with reference to FIG. 10.
FIG. 10 is a block diagram illustrating a structure of a base station carrying out a rate matching step which is a part of a HARQ step.
As illustrated in FIG. 10, a base station is comprised of a turbo-encoding unit 71, a first rate matching unit 72, an IR buffer (Incremental Redundancy buffer) 73, a second rate matching unit 74, and an interleaving/collection unit 75.
The first rate matching unit 72 is comprised of a parity 1 bit processing unit (RM_P1_1) 721 and a parity 2 bit processing unit (RM_P2_1) 722.
The second rate matching unit 74 is comprised of a systematic bit processing unit (RM_S) 741, a parity 1 bit processing unit (RM_P1_2) 742 and a parity 2 bit processing unit (RM_P2_2) 743.
The first rate matching unit 72 receives totally three bit streams, specifically, a bit stream of systematic bits having been encoded by the turbo-encoding unit 71, a bit stream of parity 1 bits, and a bit stream of parity 2 bits.
The first rate matching unit 72 compares a total number of bits (a sum of a number Nsys of systematic bits, a number Np1 of parity 1 bits, and a number Np2 of parity 2 bits) input into the first rate matching unit 72 to a space Nir (Nir=Nsys+Np1+Np2) assigned to the IR buffer 73.
If the total number of bits having been input into the first rate matching unit 72 is equal to or smaller than the space Nir assigned to the IR buffer 73, the bit stream having been input into the first rate matching unit 72
In contrast, if the total number of bits having been input into the first rate matching unit 72 is greater than the space Nir, the parity 1 bit processing unit (RM_P1_1) 721 and the parity 2 bit processing unit (RM_P2_1) 722 puncture bits out of bit streams of the parity 1 bits and the parity 2 bits.
Since a bit stream of the systematic bits is not punctured, a bit stream of the systematic bits passes through the first rate matching unit 72 without being processed.
The above-mentioned removing bits out of bit streams of the parity 1 bits and the parity 2 bits makes a total number of bits output from the first rate matching unit 72 equal to the space Nir assigned to the IR buffer 73.
The second rate matching unit 74 receives the three bit streams through the IR buffer 73 from the first rate matching unit 72.
If a total number of bits (a sum of a number Nsys of systematic bits, a number Np1 of parity 1 bits, and a number Np2 of parity 2 bits) input into the second rate matching unit 74 is greater than a number Ndata (Ndata=Nt,sys+Nt,p1+Nt,p2) of bits of a physical channel available in HS-PDSCH at TTI (transmission time interval), the systematic bit processing unit (RM_S) 741, the parity 1 bit processing unit (RM_P1_2) 742 and the parity 2 bit processing unit (RM_P2_2) 743 puncture bits out of bit streams of the systematic bits, the parity 1 bits, and the parity 2 bits.
If the total number of bits input into the second rate matching unit 74 is smaller than the number Ndata, the systematic bit processing unit (RM_S) 741, the parity 1 bit processing unit (RM_P1_2) 742 and the parity 2 bit processing unit (RM_P2_2) 743 carry out a repetition step in which bits are repeatedly repeated into bit streams of the systematic bits, the parity 1 bits, and the parity 2 bits.
If the total number of bits input into the second rate matching unit 74 is equal to the number Ndata, bit streams of the systematic bits, the parity 1 bits, and the parity 2 bits pass through the second rate matching unit 74 without being processed.
The above-mentioned step of removing bits and repetition step are detailed, for instance, in “3GPP TS25.212 V5.3.0 (Release 5)”.
Data to which a second rate matching step was carried out in the second rate matching unit 74 is divided into each of physical channels in the interleaving/collection unit 75, and then, transmitted to a mobile communication device of a receiver.
Hereinbelow is explained a HARQ step to be carried out in a mobile communication device (receiver), with reference to FIG. 11.
FIG. 11 is a block diagram illustrating a structure of a mobile communication device which carries out a rate de-matching step which is a part of a HARQ step.
As illustrated in FIG. 11, the mobile communication device is comprised of a de-interleaving/de-collection unit 85, a second rate de-matching unit 84, an IR buffer 83, a first rate de-matching unit 82, and a turbo-decoding unit 81.
The first rate de-matching unit 82 is comprised of a parity 1 bit processing unit (DRM_P1_1) 821 and a parity 2 bit processing unit (DRM_P2_1) 822.
The second rate de-matching unit 84 is comprised of a systematic bit processing unit (DRM_S) 841, a parity 1 bit processing unit (DRM_P1_2) 842, and a parity 2 bit processing unit (DRM_P2_2) 843.
With reference to FIG. 11, a HARQ step is carried out in the mobile communication device in an order opposite to an order in which a HARQ step is carried out in the base station illustrated in FIG. 10.
The second rate de-matching unit 84 carries out a second rate de-matching step, that is, a step opposite to the second rate matching step carried out in the second rate matching unit 74.
Specifically, the systematic bit processing unit (DRM_S) 841, the parity 1 bit processing unit (DRM_P1_2) 842, and the parity 2 bit processing unit (DRM_P2_2) 843 carry out either a de-repetition step in which bits having been repeated in the second rate matching step in the base station are punctured out of the bit streams having been received from the de-interleaving/de-collection unit 85, or a de-puncturing step in which “0” as a bit having been punctured in the second rate matching step in the base station is added to the bit streams having been received from the de-interleaving/de-collection unit 85.
The first rate de-matching unit 82 carries out a first rate de-matching step, that is, a step opposite to the first rate matching step carried out in the first rate matching unit 72.
Specifically, the parity 1 bit processing unit (DRM_P1_1) 821 and the parity 2 bit processing unit (DRM_P2_1) 822 add “0” as a bit having been punctured in the first rate matching step in the base station, to the bit streams transmitted from the IR buffer 83.
Since a bit is not punctured out of a bit stream of the systematic bits in the first rate matching step, a bit stream of the systematic bits passes through the first rate matching unit 82 without being processed.
Data to which the first rate de-matching step was carried out in the first rate de-matching unit 82 is then decoded in the turbo-decoding unit 81.
Hereinbelow is explained a conventional HS-PDSCH decoder.
FIG. 12 is a block diagram of a conventional HS-PDSCH decoder.
With reference to FIG. 12, a conventional HS-PDSCH decoder is comprised of a received-data buffer 400, a demodulator 401, a de-interleaving/de-collection unit 402, a second rate de-matching unit 403, an adder 404, an IR buffer 405, a first rate de-matching unit 406, an input buffer 407, a turbo-decoder 408, and a selector 410.
The received-data buffer 400 temporarily stores received data Rx comprised of packet data of HS-PDSCH.
The demodulator 401 demodulates data read out of an associated address of the received-data buffer 400.
The de-interleaving/de-collection unit 402 carries out a de-interleaving/de-collection step to data having been demodulated in the demodulator 401.
The second rate de-matching unit 403 carries out a second rate de-matching step in which bits having been repeated in the second rate matching step in the base station are punctured out of data to which the de-interleaving/de-collection step was carried out in the de-interleaving/de-collection unit 402, or bits having been punctured in the second rate matching step in the base station are repeated to data to which the de-interleaving/de-collection step was carried out in the de-interleaving/de-collection unit 402.
The adder 404 carries out a combining step in which an output transmitted from the second rate de-matching unit 403 and an output transmitted from the selector 410 are added to each other.
The IR buffer 405 temporarily stores data to which the combining step was carried out in the adder 404, as data to be added in the next combining step to be carried out in the adder 404. Herein, the IR buffer 405 has a bit width X.
The selector 410 selects one of an output transmitted from the IR buffer 405 and “0”, and outputs the selected one to the adder 404.
For instance, if the received data Rx is comprised of newly transmitted packet data, the selector 410 selects and outputs “0”, in which case, the adder 404 adds “0” to an output transmitted from the second rate de-matching unit 403. Thus, an output transmitted from the second rate de-matching unit 403 is written into the IR buffer 405 as it is for the preparation of the next combining step.
In contrast, if the received data Rx is comprised of re-transmitted packet data, the selector 410 selects and outputs an output transmitted from the IR buffer 405, in which case, the adder 404 adds packet data stored in an address in the IR buffer 405, but not yet re-transmitted, to an output transmitted from the second rate de-matching unit 403. The result of the addition is written into the address (namely, an address at which data was read out of the IR buffer 405 prior to the addition) in the IR buffer 405 for the preparation of the next combining step.
The first rate de-matching unit 406 carries out a first rate de-matching step in which bits having been punctured in the first rate matching step in the base station are repeated into data output from the IR buffer 405.
The input buffer 407 temporarily stores an output transmitted from the first rate de-matching unit 406 for the preparation of a turbo-decoding step to be carried out in the turbo-decoder 408.
The turbo-decoder 408 repeatedly carries out a turbo-decoding step to data transmitted from the IR buffer 407, and outputs decoding result 409.
Furthermore, the turbo-decoder 408 carries out a CRC (Cyclic Redundancy Check) judgment step based on the decoding result 409. A result (OK or NG) of the CRC judgment is finally reported to the base station through a transmitter (not illustrated).
Hereinbelow is explained an operation of the conventional HS-PDSCH illustrated in FIG. 12, with reference to FIG. 13.
With reference to FIG. 13, an operation of the conventional HS-PDSCH is comprised of a first stage, a second stage, and a third stage. In the first stage, a demodulation step, a de-interleaving step and a de-collection step, a second rate de-matching step, and a combining step are carried out to the data Rx received from the base station, respectively, in the demodulator 401, the de-interleaving/de-collection unit 402, the second rate de-matching unit 403, and the adder 404. The result is stored in the IR buffer 405.
In the second stage, a first rate de-matching step is carried out in the first rate de-matching unit 406 to data transmitted from the IR buffer 405. The result is stored in the input buffer 407.
In the third stage, a turbo-decoding step and a CRC step are carried out in the turbo-decoding unit 408 to data transmitted from the input buffer 407.
The turbo-decoding step is based on an algorithm having a repetitive structure. Accordingly, in each turbo-decoding step, input data is read out of the input buffer 407, and a turbo-decoding step is carried out to the thus read-out data.
As mentioned above, a total period of time necessary for processing received data in the conventional HS-PDSCH decoder is equal to a sum of a period of time necessary for processing received data in the first stage, a period of time necessary for processing received data in the second stage, and a period of time necessary for processing received data in the third stage. Thus, a total period of time necessary for processing received data is generally long.
However, a mobile communication device such as a mobile phone is strictly required to accomplish real-time communication. Accordingly, it is quite important in a mobile communication device mounting a HS-PDSCH decoder thereon to shorten a period of time necessary for processing received data in a HS-PDSCH decoder, and accomplish effective HSDPA functions.
For instance, Japanese Patent Application Publication No. 2002-344358 has suggested a parallel-transmission system for spreading and de-spreading data with pseudorandom noise (PN) codes, and transmitting the data in CDMA, including a transceiver for spreading and transmitting data with different pseudorandom noise codes, and synthesizing the data obtained by de-spreading received signals with the pseudorandom noise codes, and a controller carries out closed-loop control to a number of pseudorandom noise codes with which the data is to be spread or de-spread.
International Publication WO2002/062001 of the international application PCT/JP2001/000675 has suggested a method of simultaneously carrying out both a de-interleaving step and a rate de-matching step to demodulated signals in a receiver receiving radio-signals to which both an interleaving step and a rate matching step were carried out in a transmitter for collecting errors.
Japanese Patent Application Publication No. 2004-349763 has suggested a receiver to be used in a CDMA (Code Division Multiple Access) type mobile communication system, including an arbitrator which, on receipt of transmission formats different from one another in accordance with frames during a transmission period of time of a transmission channel, selecting a transmission format considered most reliable among the received transmission formats, as an arbitration transmission format.